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this is information on a product in full production. october 2014 docid027119 rev 1 1/13 pm8841 1 a low-side gate driver datasheet - production data features ? low-side mosfet driver ? 1 a sink and 0.8 a source capability ? external reference for input threshold ? wide supply voltage range (10 v 18 v) ? input and output pull-down resistors ? short propagation delays ? input and output uvlo ? wide operating temperature range: -40 c to 125 c ? sot23-5 package applications ? smps ? digital lighting ? wireless battery chargers ? digitally controlled mosfets description the pm8841 is a high frequency single channel low-side mosfet driver specifically designed to work with digital power conversion microcontrollers, such as the stmicroelectronics stlux? family of products. the pm8841 output can sink 1 a and source 0.8 a. the input levels of the driver are derived by the voltage present at the in_th pin (between 2 v and 5.5 v). this pin is typically connected at the same voltage of the microcontroller supply voltage. the pm8841 device includes both input and output pull-down resistors. uvlo circuitry for input and output stages is present preventing the ic from driving the external mosfet in unsafe condition. sot23-5 table 1. device summary order code package PM8841D sot23-5 www.st.com
block diagram pm8841 2/13 docid027119 rev 1 1 block diagram figure 1. PM8841D block diagram $0 ,1 ,1b7+ 9&& *1' 287 89/2 89/2b7+ /hyho vkliwhu
docid027119 rev 1 3/13 pm8841 pin connection 13 2 pin connection figure 2. pin connection table 2. pin description symbol pin description vcc 1 ic power supply. a voltage comprised between 10 v and 18 v can be connected between this pin and gnd to supply the ic. gnd 2 reference voltage connection. in 3 digital input signal for driver. it is internally pulled down to gnd with a 100 k ? (typ.) equivalent resistor. in_th 4 input for the in pin's threshold definition: a voltage can be applied obtaining the values for vih and vil. out 5 mosfet gate drive sourcing / sinking output controlled by the in pin. a pull-down equivalent resistor [50 k ? (typ.)] is present. 9&& *1' ,1 287 ,1b7+ $0
maximum ratings pm8841 4/13 docid027119 rev 1 3 maximum ratings table 3. thermal data symbol parameter value unit r thja thermal resistance junction to ambient (2-layer fr4 pcb, t a = 27 c natural convection) 250 c/w r thjc thermal resistance junction to case 130 c/w t max maximum junction temperature 150 c t stg storage temperature range -40 to 150 c t j junction temperature range -40 to 150 c t a operating ambient temper ature range -40 to 125 c table 4. absolute maximum ratings symbol parameter value unit note v vcc,max maximum ic supply voltage 19 v in unconnected, in_th = 3.3 v max. negative allowed voltage - 0.3 v v in_th,max max. positive voltage at in_th pin 5.5 v max. negative allowed voltage - 0.3 v v in,max maximum voltage at in pin 5.5 v max. negative allowed voltage - 0.3 v i out,rms maximum rms output current 100 ma
docid027119 rev 1 5/13 pm8841 electrical characteristics 13 4 electrical characteristics (v cc = 12 v, v in_th = 3.3 v, tj = - 40 125 c, unless otherwise specified) table 5. electrical characteristics symbol pin parameter test condition min. typ. max. unit ic supply v cc vcc operating range 10 18 v v cc,on vcc turn-on threshold 9 10 11 v v uvlo,hyst vcc uvlo hysteresis 0.5 1 v i st-up vcc start-up current v cc = v cc,on - 0.5 v 40 a i cc,0 vcc static supply current in = 0 v 40 a i cc,op vcc operating supply current see figure 4 and figure 5 in_th v in_th in_th operating range 2 5.5 v v in_th,uv in_th in_th uvlo in_th short with in, rising edge 1.5 v i in_th in_th in_th pin bias current (1) 40 a input v ih /v in_th in relative input high level threshold (2) 36 58 % v il /v in_th in relative input low level threshold (2) 25 46 % v in_hyst in hysteresis 7 25 % iin in in pin bias current vin = 5 v 50 a r inpd in input pull-down resistance vin = v in_th 100 k ? t d_lh in in to gd propagation delay in low to high, no load 30 ns t d_hl in in to gd propagation delay in high to low, no load 30 ns output v out,h out out pin high level isrc = 100 ma, t j = 25 c 11.4 v isrc = 100 ma, t j = -40 125 c (1) 11.4 v out,l out out pin low level isnk = 100 ma, t j = 25 c 0.53 v isnk = 100 ma, t j = -40 125 c (1) 0.53 i src out source current (1) v out = v cc / 2 940 ma i snk out sink current (1) v out = v cc / 2 1.1 a t r out rise time c out = 470 pf 20 ns t f out fall time c out = 470 pf 20 ns r gpd out pull-down resistor 50 k ? 1. not tested in production. 2. overlapping prevent by hysteresis v in_hyst .
electrical characteristics pm8841 6/13 docid027119 rev 1 figure 3. timings figure 6. v cc power dissipation (pd) when no load is applied $0 ,1 9&& 287 9,+ 9,/ 7 'b/+ 7 'b+/ 7 ) 7 5 figure 4. operating supply current (no lo ad) figure 5. operating supply current (c out = 470 pf)
docid027119 rev 1 7/13 pm8841 typical applications 13 5 typical applications figure 7. test circuit figure 8. digitally controlled pfc boost converter $0 9 9 &7+ q) ,1b7+ ,1 9&& 287 30 &rxw s) $0 9$& 93)& /rjlf9&& 3rzhu9&& 9&& ,1b7+ ,1 287
typical applications pm8841 8/13 docid027119 rev 1 figure 9. digitally controlled flyback converter figure 10. digitally controlled inverse buck converter (e.g.: led controller) $0 9$& /rjlf9&& 3rzhu9&& 9&& ,1b7+ ,1 287 9287 $0 9 b +9 /rjlf9&& 3rzhu9&& 9&& ,1b7+ ,1 287 /('vwulqj
docid027119 rev 1 9/13 pm8841 application guidelines 13 6 application guidelines 6.1 power supply the pm8841 driver is intended to drive power mosfets used in power conversion topologies at high speed. the accurate supp ly voltage definition guarantees an effective driving in every condition. the voltage present at the in_th pin is used for the threshold definition. it could be the same voltage used to supply the device providing the signal applied to the in pin, or it can be derived by the vcc pin, eventually using a voltage divider. it is mainly suggested to provide in_t h voltage starting from vcc voltage. for example, in figure 11 , an auxiliary, unregula ted, voltage can be used to be connected to both pm8841 vcc pin and the input of a linear regulator that provides a well regulated supply voltage for logic circuitry. the same low voltage is then provided to the in_th pin of the pm8841. if the in_th is derived directly by vcc pin, the structure illustrated in figure 12 can be used. it is mandatory to properly connect a 100 nf ceramic cap as close as possible to the vcc pin to bypass the current's spikes absorbed by vcc during the gate charging. also in_th voltage should be filtered with a ceramic capacitor (10 nf to 100 nf), especially when long traces are used to supply it; when derived by vcc a lighter filtering is allowed. 6.2 layout suggestions the small package of the pm8841 allows to plac e it very close to the gate of the driven mosfet: this reduces the risk of injecting high frequency noise produced by the driving current running between the out pin and the mosfet's gate pin. figure 11. shared supply configuration figur e 12. independent supply configuration $0 $0
application guidelines pm8841 10/13 docid027119 rev 1 6.3 driving switches the in pin truth table is reported in table 6 . differential mosfet's driving st rength is seldom necessary in topologies such as flybacks or boost controlled in the peak current mode. a lower driving current is used to turn on the mosfet in order to reduce the emi produced by the miller capacitance activation, while a stronger turn-off action is suggested to minimi ze the turn-off delay and, consequently the deviation between theoretical and practical behaviors. the same asymmetrical driving strength is requ ired when the igbt swit ch is used: in fact the driving strength control is mandatory to avoid latch-up phenomena intrinsically related with this kind of the switch. the asymmetrical driving can be realized using a diode and resistance as illustrated in typical application diagrams (refer to the pm8851 device when accurate control of the asymmetrical driving current is required). when low switching frequencies are required and propagation delays can be compensated, it is possible to drive contem porary the in pin and the in_th pin to exploit the relevant uvlo threshold of the device (typ. 1.5 v) using the pm8841 as a fixed threshold device without any external component: care has to be taken to consider an additional propagation delay (typ. 300 ns) after the falling edge of the input signal. 6.4 power dissipation overall power dissipation can be evaluated cons idering two main contributions: the device related consumption (pd) and the gate driving power demand (pg): equation 1 p to t = p d + p g the device power consumption can be found in figure 6 on page 6 : it represents the power required by the device to supply internal structures and pull-downs resistors. the gate driving power dissipation is the power required to deliver to and from the mosfet's gate the required gate charge: equation 2 p g = q g x v gs x f sw the q g value can be found depicted into the mosfet's datasheet for any applied v gs : v gs can considered equal to vcc. table 6. pm8841 truth table in pm8841 high high low low
docid027119 rev 1 11/13 pm8841 package information 13 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark. figure 13. sot23-5 package outline table 7. sot23-5 package mechanical data symbol dimensions (mm) dimensions (inches) note typ. min. max. typ. min. max. a 0.90 1.45 0.035 0.057 a1 0.00 0.15 0.000 0.006 a2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.09 0.20 0.004 0.008 d 2.80 3.05 0.11 0.12 e 1.50 1.75 0.059 0.069 e 0.95 0.037 h 2.60 3.00 0.102 0.118 l 0.30 0.60 0.012 0.024 q 0 10 0 10 degrees
revision history pm8841 12/13 docid027119 rev 1 8 revision history table 8. document revision history date revision changes 29-oct-2014 1 initial release.
docid027119 rev 1 13/13 pm8841 13 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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